Our company's development tools are prepared and develop to help our customers IO-Link development. Our development tools are covering the fields of:

  • Physical layer testing (testing of electrical, signalform, etc) 
  • Protocol tests (supporting IO-Link test specification testcases on Data-Link layer and Application layer)
  • EMC Test devices (special EMC test device and EMC hardened test master)
  • All tester suites are generating automatic reports in PDF format, this why you have a test report in a ready-to-deliver electric format. 

Test Master für EMV Konformitätstests

The IO-Link specification defines well defined procedures to test the EMC robustness of IO-Link devices.

Some tests are checking the sensitivity of the IO-Link communication of IO-Link devices under EMC conditions.

This requires an robust master that is much less sensitive to EMC noise than the device under test.

This is achieved by separating the IO-Link master into two parts: part 1 contains the sensitive digital logic  (µC- box), part 2 contains the IO-Link transceiver (PHY-box).

Both parts are separated by an optical connection with a length of up to 10m

EMC Test System for Devices Features

  • Complies to IO-Link interface specification V1.1.2 and the current IO-Link test specification.
  • Error and Signal output
  • 4 electrical IO-Link port configurations
    • COM1/2 speed port (good signal)
    • COM1/2 speed port (bad signal)
    • COM3 speed port (good signal)
    • COM3 speed port (bad signal)
  • RS232 and USB interfaces
  • Terminal based control command set
  • Additional EMC test and control software with graphical user interface
  • Test report generation in PDF Format
  • Can be configured to operate as standard "USB IO-Link Master"
  • Firmware update supported

Advantages

  • Sensitive Parts are located outside EMC chamber
  • EMC robustness considerably better than required

Test-Device für EMV-Konformitätstest

The IO-Link Interface Specification V1.1.2 defines a specific Test-Device (see Appendix G.2.2 Test of a Master) that shall be connected to an IO-Link Master during the Execution of EMC tests.

Functional Description

The device generates an 8-bit random number which are read out by the master. During the test the master shall return this random number to the device in the next IO-Link cycle.

The device checks, whether it receives the correct random number and increments an internal error counter if not. The error counter is also incremented if a checksum error or a parity error is detected on the device side.

The error count can be read out by the master via an IO-Link parameter after the test. In addition the error counter value is also displayed by a 7-segment indicator.

When an error is detected the device generates a trigger signal at an optical output. A trigger box that converts the optical signal into a trigger pulse can be connected to the device. The trigger pulse supports developers in identifying possible issues on the master side.

The device can be configured to operate in one of  3 COM-speeds by DIP-Switches.

EMC-Test-Device Features

  • Device fully compliant to V1.1.2 IO-Link Interface Specification
  • All 3 COM-Speeds supported (Switch Selector)
  • Internal Pseudo-Random-Number Generators
  • Error counter for Parity, Checksum, Data and Time-out Errors
  • 7-Segment Error Counter Display
  • 7-Segment Device Status Display
  • Errors Counter accessible via IO-Link
  • Optical Error Trigger Output

Advantages

  • No development effort for master manufacturers
  • Better time-to-market
  • Identification of EMC issues

IODD-Designer

IODD-Designer

IO-Link devices need to be described by IO-Link Device Descriptions called "IODD". These IODD are complex structured XML files with numerous restrictions and interdependencies. The Generation of an IODD can become a laborious and tedious task and it is difficult to maintain integrity between device and IODD in case of modifications.

TEConcept has developed an IODD Designer that simplifies the generation of IODDs significantly.

No XML know how is required to generate an IODD. The user basically has to fill out text fields. For every text field a info box is available that shows related information with reference to the IO-link specifications. The IODD Designer supports creation of new IODDs from scratch as well as import and modification of  existing IODDs.

Generated IODDs can be checked and "stamped" by using the "official" IODD checker from the IO-Link webpage.

IODD Designer Features

  • Complies to IO-Link Interface Specification   V1.1.2
  • Complies to current IODD-specification (V1.1) and V1.0 (August 2011)
  • IODD import supported (for view and edit)
  • V1.1/V1.0 generation from the same data set.
  • Help/Info support for entries
  • IODD checking and stamping support based on IODD checker of the IO-Link community
  • Installer for Windows 7/8/10
  • Current project status can be saved and restored
  • Errors are detected and corrected during entry
  • Context sensitive information on entries with reference to IODD specification
  • Smart Sensor profile supported

Advantages

  • Speed up of IODD generation
  • XML know how not required
  • Import and modification of IODDs supported
  • Assures consistency related XML-elements in the generated IODD
  • Extended error checking

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