Test-Device für EMV-Konformitätstest

The IO-Link Interface Specification V1.1.2 defines a specific Test-Device (see Appendix G.2.2 Test of a Master) that shall be connected to an IO-Link Master during the Execution of EMC tests.

Functional Description

The device generates an 8-bit random number which are read out by the master. During the test the master shall return this random number to the device in the next IO-Link cycle.

The device checks, whether it receives the correct random number and increments an internal error counter if not. The error counter is also incremented if a checksum error or a parity error is detected on the device side.

The error count can be read out by the master via an IO-Link parameter after the test. In addition the error counter value is also displayed by a 7-segment indicator.

When an error is detected the device generates a trigger signal at an optical output. A trigger box that converts the optical signal into a trigger pulse can be connected to the device. The trigger pulse supports developers in identifying possible issues on the master side.

The device can be configured to operate in one of  3 COM-speeds by DIP-Switches.

EMC-Test-Device Features

  • Device fully compliant to V1.1.2 IO-Link Interface Specification
  • All 3 COM-Speeds supported (Switch Selector)
  • Internal Pseudo-Random-Number Generators
  • Error counter for Parity, Checksum, Data and Time-out Errors
  • 7-Segment Error Counter Display
  • 7-Segment Device Status Display
  • Errors Counter accessible via IO-Link
  • Optical Error Trigger Output

Advantages

  • No development effort for master manufacturers
  • Better time-to-market
  • Identification of EMC issues

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